Mixed-Signal IC Layout Engineer

Job Title: Mixed-Signal IC Layout Engineer Location: Swindon (On-Site Working) Salary: £60,000 - £70,000 + Bonus & Benefits (Depending on Experience)

Please Note: All Applicants must have the right to work in the UK without the need for VISA sponsorship now or in the future.

Overview:

We’re supporting a leading ASIC technology business in the recruitment of an experienced Mixed-Signal IC Layout Engineer to join a highly skilled, multidisciplinary engineering team in Swindon.

As a Mixed-Signal IC Layout Engineer, you will play a key technical role in the physical implementation of complex mixed-signal integrated circuits, taking responsibility for layout, floor-planning, physical verification and tapeout activities.

Working closely with analogue and electronics design engineers, you will provide specialist expertise throughout the IC design process, helping to define and refine layout approaches, topologies, constraints and area requirements.

You will also contribute to CAD tools, PDKs and design methodologies, ensuring designs meet the required technical, quality and manufacturing standards.

This is an excellent opportunity for an experienced IC Layout Engineer to work on innovative ASIC and MEMS solutions, contributing to projects from initial specification through to qualified silicon, while working alongside experienced engineers across analogue, digital, mixed-signal and semiconductor disciplines.

Job Responsibilities:

Contribute to chip and block floor-planning, IC layout and physical verification activities. Work closely with analogue design engineers to define and refine effective layout solutions, including topologies, matching, constraints and area optimisation. Take ownership of layout activities through physical verification, sign-off and tapeout. Apply an understanding of semiconductor processes, design rules and manufacturing requirements to deliver robust, manufacturable layouts. Support and maintain CAD tools, PDKs and associated technology files and rules. Work with semiconductor process suppliers to understand process capabilities and support technology selection where required. Use scripting, including Python and/or Perl, to automate and improve layout and engineering workflows. Mentor less experienced engineers and contribute to wider technical and continuous improvement activities across the department. Required Skills & Experience:

Degree-level qualification in Physics, Electronic/Electrical Engineering or a related discipline, or equivalent industry experience. IC layout experience, with strong expertise in mixed-signal and/or analogue layout techniques. Proven experience with 55nm–180nm processes; experience with smaller geometries would be advantageous. Track record of contributing to or leading layout activities across multiple successful tapeouts. Understanding of analogue design principles, IC design flows, physical verification and semiconductor manufacturing. Experience with industry-standard IC design/layout tools, PDKs and design rules, ideally within a Linux environment. Proficiency in Python, Perl or similar scripting languages, with an ability to improve engineering processes through automation. Strong communication, problem-solving and organisational skills, with the ability to manage competing priorities, collaborate across multidisciplinary teams and provide technical guidance to others when required