Senior ASIC Verification Engineer: SystemVerilog/UVM, UPF

Swedium Global Services is seeking an experienced ASIC Verification Engineer to join our growing verification team. You will lead SystemVerilog/UVM based verification, develop test plans, and verify UPF-powered features for complex ASIC/SoC designs.

Remote from EU position with 8+ years of related experience; strong debugging and collaboration with design teams are essential for timely verification closure and regression testing.

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