Senior ASIC Verification Principal – Interface IP Lead

A leading tech company in the United Kingdom is seeking an experienced ASIC Digital Verification Engineer to drive innovation in chip design. The role requires extensive knowledge in verification methodologies, particularly Interface IP protocols like PCIe and DDR. You will lead verification processes, mentor junior engineers, and collaborate with various teams to ensure high-quality designs. The position offers competitive rewards and is ideal for problem solvers committed to continuous improvement. Join us to enhance our cutting-edge technologies. #J-18808-Ljbffr