Senior Low Latency C++ Developer

We are seeking highly skilled C++ engineers to join our Systematic technology team, focused on building modern low latency, high availability research, and trading infrastructure.

Key Responsibilitie

• sDesign & Development : Architect, develop, and optimize low latency trading components and infrastructure, with a focus on performance, reliability, and scalability
• .Market Access : Integrate and maintain connectivity to global exchanges and liquidity venues. Develop and maintain order management systems (OMS), including order routing, risk checks, and real-time state management
• .Performance Tuning : Profile, benchmark, and tune systems for ultra-low latency and high throughput
• .Collaboration : Work closely with quantitative researchers, systematic portfolio managers, traders, and other technologists to deliver solutions aligned with business needs
• .Reliability : Ensure high availability and resiliency of trading systems, including participation in on-call support rotations as needed
• .Greenfield build out : Evaluate and incorporate new technologies and best practices to maintain a competitive edge in technology

.Required Skills & Experien

• ceStrong foundation in algorithms, data structures, distributed systems, and software desig
• n.Expert-level proficiency in C++ (modern standards, e.g., C++20/23); strong experience with Python and/or other modern languages like Rus
• t.Demonstrated experience building and optimizing low latency, high throughput systems in a production trading environmen
• t.Strong grasp of networking (TCP/UDP, multicast), Linux systems programming, and performance profiling tool
• s.Familiarity with automated testing, CI/CD, and best practices for building robust, fault-tolerant system
• s.Excellent communication skills and ability to work effectively in a fast-paced, global team environmen

.Preferred Qualificati

• onsExperience with systematic or algorithmic trading systems in a hedge fund, proprietary trading firm, or investment ba
• nk.Familiarity with hardware acceleration concepts (FPGA, kernel bypass, RDMA) and ultra-low latency networking stac
• ks.Exposure to cloud-native architectures and containerization (e.g., Kubernetes, Docker) for hybrid deploymen

#J-18808-Ljbffr