Analog Mixed-Signal IC Design Engineer – Data Converters (ADC/DAC), Staff - Cambridge, UK

Company:

Qualcomm Technologies International Ltd

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

An enthusiastic Analogue IC design engineer is required to work with the existing design team on new radio developments for next generation of IOT products. This role is essential to strengthen our team capabilities to deliver innovative and quality designs on schedule to meet our business commitments in IOT.

You shall be working alongside the existing analogue design team in the development of data converters for IOT products. We shall also be developing test-level interfaces and general analogue circuits for our new products.

The successful candidate will work within the Analogue/RF group based in Cambridge, UK, on circuit designs for use in radio transceivers. This involves a wide range of circuits from RF through to baseband and PLLs, with an emphasis on low power design. You will be responsible for the design from the initial choice of architecture to the final delivery of the design. The ability to innovate new techniques to meet challenging and sometimes evolving circuit requirements due to ever-changing market conditions is highly desired. The candidate will ideally have experience in data converter designs (ADCs and DACs). One aspect of the work involves working closely with layout engineers, defining the floor plan and providing guidance to optimizing the layout while maintaining good circuit performance.

The candidate will also work closely with other disciplines such as the Radio system team to help to define the system requirements. After the design is fabricated, the candidate will be involved with cell characterization to ensure the design meets system requirements and to take the design through to production.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Minimum Qualifications:

• Ideally 5 or more years of industrial experiences in analogue/RF IC design with experience in ADC and DAC design for a Staff level position. Additional experience in any of the following: PLL, VCO, PA, LNA, Mixer, Filter, crystal oscillator is desirable but not essential.
• The role is also open for recent graduates with a relevant PhD depending upon specialization.
• Solid understanding of the fundamentals of analogue/RF circuit design and fully competent in analogue design and verification using Cadence tools.
• Experience of taking a design from specification through to production is desirable.
• Familiarity of the system requirements on one or more of the following wireless standard: WLAN, BT, LTE.
• A solid background in data converter architectures, circuit design and verification, is highly desirable.
• Proven track record of delivering circuit designs with minimal supervision is required for Staff level.
• Working knowledge of Verilog-AMS modelling, MATLAB and Python is a bonus.
• Familiar with the use of laboratory equipment e.g. spectrum analysers, digital oscilloscopes, signal generators.

Preferred Qualifications:

• Enthusiastic about analogue circuit design.
• Enjoy being part of a team developing advanced low power transceiver solutions through to production.
• Ability to work with teams in multi disciplines to deliver solutions, often with aggressive deadlines.

References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

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